Page DC

CIA 1

Address	Name	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0	Description
DC00	CIA1PRA	KM7 PAD	KM6 PAD	KM5	KM4 J2FB LPEN	KM3 J2Dn	KM2 J2Up	KM1 J2Rt	KM0 J2Lt	Data Port A^[1,2,3]
DC01	CIA1PRB	KM7 TIMB	KM6 TIMA	KM5	KM4 J1FB LPEN	KM3 J1Dn	KM2 J1Up	KM1 J1Rt	KM0 J1Lt	Data Port B^[1,4]
DC02	CIA1DDRA	DDA7	DDA6	DDA5	DDA4	DDA3	DDA2	DDA1	DDA0	Data Direction Port A
DC03	CIA1DDRB	DDB7	DDB6	DDB5	DDB4	DDB3	DDB2	DDB1	DDB0	Data Direction Port B
DC04	CIA1TIMAL	TIMAL								Timer A Low byte
DC05	CIA1TIMAH	TIMAH								Timer A High byte
DC06	CIA1TIMBL	TIMBL								Timer B Low byte
DC07	CIA1TIMBH	TIMBH								Timer B High byte
DC08	CIA1RTCT	RTCT								Real time clock 1/10s
DC09	CIA1RTCS	RTCS								Real time clock seconds
DC0A	CIA1RTCM	RTCM								Real time clock minutes
DC0B	CIA1RTCH	RTCH								Real time clock hours
DC0C	CIA1SR	SR								Shift register
DC0D	CIA1ICS	IRQ Source	Always 0 Unused		IRQ Flag IntRel	SDR IntRel	Alarm IntRel	UTB IntRel	UTA IntRel	Interrupt Control & Status Read top, Write bottom
DC0E	CIA1CTA	RTC^[5]	SRC^[6]	TSRC^[7]	Load^[8]	RES^[9]	OVFL^[10]	UNFL1^[11]	START	Control Timer A
DC0F	CIA1CTB		TCOUNT^[13]		Load^[8]	RES^[9]	OVFL^[10]	UNFL2^[12]	START	Control Timer B

Multiple address ranges

CIA1 is mapped to addresses 0xDCxx but only occupies 16 bytes. Referencing any address from 0xDC1x…0xDCFx will mirror those at 0xDC0x.

Keyboard matrix pins are R/W. PRA for columns, PRB for rows
Joystick pins 0=activated. Port 1 in PRA and Port 2 on PRB
Bits 6 & 7 of CIA1PRA selects paddle, %01=Paddle A, %10=Paddle B
Bits 6 & 7 of CIA1PRB handler timer toggle/impule output.<br/>Bit 2 of register 14 or timer A & 15 for B
RTC 0=60Hz 1=50Hz
Shift register direction SP pin 0=read, 1=write
TSRC 0=count system cycles, 1=positive slope at CNT pin
1 = Load latic into the timer once
0 = Timer restart after underflow (latch reloaded), 1 = timer stops after underflow
0 = Timer overflow, port B bit 6 high 1 cycle, 1 = underflow, port B bit 6 inverted
1 = Indicates timer underflow at port B bit 6
1 = Indicates timer underflow at port B bit 7
Timer counts: %00 System cycle, %01 +ve slope CNT-pin, %10 Timer A underflow, %11 Timer A underflow if CNT-pin high