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; *************************************************************************** ; Headers for Commodore C64 Kernal ; Notes about the C64 operating system & memory ; Author: Peter Mount, Area51.dev & Contributors ; ; URL: https://area51.dev/c64/kernal/ ; ; Modified: Sun, 23 Jan 2022 17:05:58 UTC ; ; Current version: https://area51.dev/c64/kernal/reference/include/zasm/headers.z80 ; *************************************************************************** ; C64 Zero Page D6510 equ &0 ; 6510 On-Chip I/O DATA Direction Register R6510 equ &1 ; 6510 On-Chip I/O Port ADRAY1 equ &3 ; Vector to routine to convert Number from Floating Point to Signed Integer ADRAY2 equ &5 ; Vector to routine to convert Number from Integer to Floating Point VERCK equ &A ; Flag: LOAD or VERIFY TXTTAB equ &2B ; Pointer to start of BASIC program text VARTAB equ &2D ; Pointer to start of BASIC Variable storage area ARYTAB equ &2F ; Pointer to start of array variable area STREND equ &31 ; End of Basic array storage (+1), Start of free ram FRETOP equ &33 ; Pointer to bottom of string text area FRESPC equ &35 ; Temp pointer for strings BASMEMSIZ equ &37 ; Highest address used by basic BLNSW equ &CC ; Cursor Blink Enable RIBUF equ &F7 ; RS232 Input Buffer Pointer ROBUF equ &F9 ; RS232 Output Buffer Pointer FREKZP equ &FB ; 4 free bytes of Zero Page for User Programs BASZPT equ &FF ; BASIC temp data area for floating point to ASCII conversion ; C64 Page 2 BUF equ &200 ; BASIC Line Editor Input Buffer LAT equ &259 ; Active logical file number table FAT equ &263 ; Device number for each logical file SAT equ &26D ; Secondary address for each logical file KEYD equ &277 ; Keyboard buffer MEMSTR equ &281 ; Start of Memory pointer MEMSIZ equ &283 ; End of Memory pointer COLOR equ &286 ; Current Foreground text colour GDCOL equ &287 ; Colour of character under Cursor HIBASE equ &288 ; Page of Screen Memory XMAX equ &289 ; Max length of keyboard buffer RPTFLG equ &28A ; Which keys will repeat SHFLAG equ &28D ; Shift/Ctrl/Commodore key pressed LSTSHF equ &28E ; Last value of Shift/Ctrl/Commodore key pressed MODE equ &291 ; Shift/Commodore switch AUTODN equ &292 ; Screen scrolling enabled M51CTR equ &293 ; Mock 6551 RS-232 Control Register M51CDR equ &294 ; Mock 6551 RS-232 Command Register M51AJB equ &295 ; Mock 6551 RS-232 Nonstandard Bit Timing M51STAT equ &297 ; Mock 6551 RS-232 Status Register RIDBE equ &29B ; RS-232 Index to end of receive buffer RIDBS equ &29C ; RS-232 Index to start of receive buffer RODBE equ &29D ; RS-232 Index to end of transmit buffer RODBS equ &29E ; RS-232 Index to start of transmit buffer ENABL equ &2A1 ; RS-232 Interrupts Enabled ; C64 Page 3 Vectors & Cassette Buffer USRPOK equ &310 ; Jump instruction for BASIC USR() function USRADD equ &311 ; Address of USR() function CINV equ &314 ; IRQ Interrupt Routine Vector CBNV equ &316 ; BRK Interrupt Routine Vector NMINV equ &318 ; NMI Interrupt Routine Vector IOPEN equ &31A ; Kernal OPEN Vector ICLOSE equ &31C ; Kernal close Vector ICHKIN equ &31E ; Kernal CHKIN Vector ICKOUT equ &320 ; Kernal CKOUT Vector ICLRCH equ &322 ; Kernal CLRCHN Vector IBASIN equ &324 ; Kernal CHRIN Vector IBSOUT equ &326 ; Kernal CHROUT Vector ISTOP equ &328 ; Kernal STOP Vector IGETIN equ &32A ; Kernal GETIN Vector ICLALL equ &32C ; Kernal CLALL Vector USRCMD equ &32E ; User-Defined Command Vector ILOAD equ &330 ; Kernal LOAD Vector ISAVE equ &332 ; Kernal SAVE Vector TBUFFR equ &33C ; Cassette I/O Buffer ; VIC-II Registers VIC2M0X equ &D000 ; X Coordinate Sprite 0 VIC2M0Y equ &D001 ; Y Coordinate Sprite 0 VIC2M1X equ &D002 ; X Coordinate Sprite 1 VIC2M1Y equ &D003 ; Y Coordinate Sprite 1 VIC2M2X equ &D004 ; X Coordinate Sprite 2 VIC2M2Y equ &D005 ; Y Coordinate Sprite 2 VIC2M3X equ &D006 ; X Coordinate Sprite 3 VIC2M3Y equ &D007 ; Y Coordinate Sprite 3 VIC2M4X equ &D008 ; X Coordinate Sprite 4 VIC2M4Y equ &D009 ; Y Coordinate Sprite 4 VIC2M5X equ &D00A ; X Coordinate Sprite 5 VIC2M5Y equ &D05B ; Y Coordinate Sprite 5 VIC2M6X equ &D00C ; X Coordinate Sprite 6 VIC2M6Y equ &D00D ; Y Coordinate Sprite 6 VIC2M7X equ &D00E ; X Coordinate Sprite 7 VIC2M7Y equ &D00F ; Y Coordinate Sprite 7 VIC2MNX equ &D010 ; Bit 8 of X coordinates VIC2CR1 equ &D011 ; Control register 1 VIC2RASTER equ &D012 ; Raster counter VIC2LPX equ &D013 ; Light pen X VIC2LPY equ &D014 ; Light pen Y VIC2SPE equ &D015 ; Sprite Enabled VIC2CR2 equ &D016 ; Control register 2 VIC2SPYE equ &D017 ; Sprite Y expansion VIC2MPTR equ &D018 ; Memory pointers VIC2INTR equ &D019 ; Interrupt Register VIC2INTE equ &D01A ; Interrupt Enabled VIC2SPDP equ &D01B ; Sprite data priority VIC2SPMC equ &D01C ; Sprite multicolour VIC2SPXE equ &D01D ; Sprite X expansion VIC2SPSPCOL equ &D01E ; Sprite-Sprite collision VIC2SPDCOL equ &D01F ; Sprite data collision VIC2BORDER equ &D020 ; Border colour VIC2B0C equ &D021 ; Background colour 0 VIC2B1C equ &D022 ; Background colour 1 VIC2B2C equ &D023 ; Background colour 2 VIC2B3C equ &D024 ; Background colour 3 VIC2SPMM0 equ &D025 ; Sprite multicolour 0 VIC2SPMM1 equ &D026 ; Sprite multicolour 1 VIC2SPCOL0 equ &D027 ; Sprite 0 colour VIC2SPCOL1 equ &D028 ; Sprite 1 colour VIC2SPCOL2 equ &D029 ; Sprite 2 colour VIC2SPCOL3 equ &D02A ; Sprite 3 colour VIC2SPCOL4 equ &D02B ; Sprite 4 colour VIC2SPCOL5 equ &D02C ; Sprite 5 colour VIC2SPCOL6 equ &D02D ; Sprite 6 colour VIC2SPCOL7 equ &D02E ; Sprite 7 colour ; SID Registers SID1FRELOW equ &D400 ; Frequency voice 1 low byte SID1FREHIGH equ &D401 ; Frequency voice 1 high byte SID1PWDCLOW equ &D402 ; Pulse wave duty cycle voice 1 low byte SID1PWDCHIGH equ &D403 ; Pulse wave duty cycle voice 1 high byte SID1CR equ &D404 ; Control Register voice 1 ; Colour memory COLMEM equ &D800 ; Colour Memory ; CIA 1 CIA1PRA equ &DC00 ; Data Port A CIA1PRB equ &DC01 ; Data Port B CIA1DDRA equ &DC02 ; Data Direction Port A CIA1DDRB equ &DC03 ; Data Direction Port B CIA1TIMAL equ &DC04 ; Timer A Low byte CIA1TIMAH equ &DC05 ; Timer A High byte CIA1TIMBL equ &DC06 ; Timer B Low byte CIA1TIMBH equ &DC07 ; Timer B High byte CIA1RTCT equ &DC08 ; Real time clock 1/10s CIA1RTCS equ &DC09 ; Real time clock seconds CIA1RTCM equ &DC0A ; Real time clock minutes CIA1RTCH equ &DC0B ; Real time clock hours CIA1SR equ &DC0C ; Shift register CIA1ICS equ &DC0D ; Interrupt Control & Status CIA1CTA equ &DC0E ; Control Timer A CIA1CTB equ &DC0F ; Control Timer B ; CIA 2 CIA2PRA equ &DD00 ; Data Port A CIA2PRB equ &DD01 ; User Port PB0-7 CIA2DDRA equ &DD02 ; Data Direction Port A CIA2DDRB equ &DD03 ; Data Direction Port B CIA2TIMAL equ &DD04 ; Timer A Low byte CIA2TIMAH equ &DD05 ; Timer A High byte CIA2TIMBL equ &DD06 ; Timer B Low byte CIA2TIMBH equ &DD07 ; Timer B High byte CIA2RTCT equ &DD08 ; Real time clock 1/10s CIA2RTCS equ &DD09 ; Real time clock seconds CIA2RTCM equ &DD0A ; Real time clock minutes CIA2RTCH equ &DD0B ; Real time clock hours CIA2SR equ &DD0C ; Shift register CIA2ICS equ &DD0D ; Interrupt Control & Status CIA2CTA equ &DD0E ; Control Timer A CIA2CTB equ &DD0F ; Control Timer B